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Low Area Reconfigurable Architecture for 3D-HEVC DMMs Decoder Targeting 1080p Videos.
Gustavo Sanchez
Ramon Fernandes
Rodrigo Cataldo
Luciano Agostini
César A. M. Marcon
Published in:
ICECS (2018)
Keyphrases
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reconfigurable architecture
video codec
low complexity
video sequences
systolic array
inter frame
video analysis
video data
video frames
video compression
high definition
pattern recognition
video surveillance
error concealment