A 12b 70MS/s SAR ADC with digital startup calibration in 14nm CMOS.
Chun C. LeeCho-Ying LuRamya NarayanaswamyJad B. RizkPublished in: VLSIC (2015)
Keyphrases
- analog to digital converter
- metal oxide semiconductor
- circuit design
- low cost
- cmos image sensor
- camera calibration
- low power
- mixed signal
- high speed
- cmos technology
- single chip
- power consumption
- synthetic aperture radar
- sigma delta
- integrated circuit
- image reconstruction
- silicon on insulator
- delay insensitive
- sar images
- wide dynamic range
- power supply
- intrinsic parameters
- automatic target recognition
- analog vlsi
- nm technology