A novel SAD architecture for variable block size motion estimation in HEVC video coding.
Purnachand NalluriLuis Nero AlvesAntonio NavarroPublished in: ISSoC (2013)
Keyphrases
- video coding
- motion vectors
- high efficiency video coding
- video codec
- video compression
- motion estimation
- video coding standard
- motion compensation
- bit rate
- motion compensated
- rate distortion
- macroblock
- video quality
- coding efficiency
- variable block size
- block size
- motion field
- video sequences
- reference frame
- block matching
- motion estimation algorithm
- search range
- temporal correlation
- low complexity
- multiview video coding
- computational complexity
- intra prediction
- video data
- real time
- inter frame
- video conferencing
- bitstream
- motion model
- visual quality
- distributed video coding
- video coder
- parallel architecture
- error concealment
- transform domain
- wyner ziv
- packet loss
- prediction error
- image sequences