Analyzing Memory Interference of FPGA Accelerators on Multicore Hosts in Heterogeneous Reconfigurable SoCs.
Maxim MattheeuwsBjörn ForsbergAndreas KurthLuca BeniniPublished in: DATE (2021)
Keyphrases
- field programmable gate array
- hardware implementation
- memory management
- digital signal processors
- embedded systems
- parallel computing
- computing power
- transactional memory
- high end
- low cost
- image processing algorithms
- hardware design
- single chip
- reconfigurable hardware
- digital signal
- massively parallel
- level parallelism
- signal processing
- efficient implementation
- hardware architecture
- computing systems
- hardware software
- memory access
- parallel programming
- processing elements
- general purpose processors
- systolic array
- parallel architectures
- image processing
- hardware software co design
- network traffic
- multipath
- reconfigurable architecture
- shared memory
- multicore processors
- low power
- compute intensive
- graphics processing units
- clock frequency
- mobile agents