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Unified Digit Serial Systolic Montgomery Multiplication Architecture for Special Classes of Polynomials over GF(2m).
Somsubhra Talapatra
Hafizur Rahaman
Samir K. Saha
Published in:
DSD (2010)
Keyphrases
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integer arithmetic
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low end
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real time
hardware implementation
data flow
modular exponentiation
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hardware architecture
xilinx virtex