Design of a Low Power Architecture for CABAC Encoder in H.264.
Chien-Chung KuoSheau-Fang LeiPublished in: APCCAS (2006)
Keyphrases
- low power
- vlsi architecture
- power reduction
- single chip
- cmos technology
- low cost
- power consumption
- low power consumption
- high speed
- low complexity
- logic circuits
- nm technology
- digital signal processing
- mixed signal
- real time
- gate array
- power dissipation
- cmos image sensor
- design process
- design considerations
- high power
- vlsi implementation
- mpeg avc
- vlsi circuits
- design methodology