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Performance analysis of alternative adder cell structures using clocked and non-clocked logic styles at 45nm technology.
T. Bhagya Laxmi
S. Rajendar
Y. Pandu Rangaiah
Published in:
ICACCI (2014)
Keyphrases
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low power
logic circuits
nm technology
power dissipation
power consumption
high speed
low cost
logic programming
fuzzy logic
multi valued
asynchronous circuits
data flow
automated reasoning
digital signal processing