Efficient VLSI architecture for buffer used in EBCOT of JPEG2000 encoder.

Amit Kumar Gupta Saeid Nooshabadi David S. Taubman

Published in: ISCAS (5) (2005)

Keyphrases

vlsi architecture
low complexity
real time
compression ratio
low power
vlsi implementation
computational complexity
motion estimation
low cost
high speed
image compression
compressed domain
video codec