Performance Analysis of Dual-Hop Relaying With I/Q Imbalance and Additive Hardware Impairment.
Yan GaoYunfei ChenNing ChenJie ZhangPublished in: IEEE Trans. Veh. Technol. (2020)
Keyphrases
- hardware and software
- real time
- low cost
- hardware implementation
- computer systems
- primal dual
- single chip
- embedded systems
- massively parallel
- high end
- base station
- control program
- hardware software
- vlsi implementation
- hardware design
- circuit design
- computing power
- cloud computing
- lower bound
- data streams
- image processing