Low power signal processing architectures using residue arithmetic.
Manish BhardwajArjun BalaramPublished in: ICASSP (1998)
Keyphrases
- low power
- signal processing
- digital signal processing
- low cost
- power consumption
- high speed
- single chip
- image processing
- pattern recognition
- high power
- signal processor
- wireless transmission
- vlsi circuits
- low power consumption
- cmos technology
- vlsi architecture
- hardware implementation
- filter bank
- logic circuits
- image sensor
- mixed signal
- gate array
- image formation
- real time