CompAct: On-chip Compression of Activations for Low Power Systolic Array Based CNN Acceleration.
Jeff Jun ZhangParul RajShuayb ZararAmol AmbardekarSiddharth GargPublished in: ACM Trans. Embed. Comput. Syst. (2019)
Keyphrases
- low power
- systolic array
- high speed
- low cost
- single chip
- mixed signal
- reconfigurable architecture
- low power consumption
- power consumption
- cmos technology
- data flow
- signal processor
- parallel architecture
- image sensor
- ultra low power
- high power
- power dissipation
- compression ratio
- vlsi circuits
- nm technology
- image compression
- digital signal processing
- power reduction
- compression algorithm
- cmos image sensor
- image quality
- vlsi architecture
- power management