A 2.4GHz 256/1024-bit Encryption Accelerator reconfigurable Montgomery multiplier in 90nm CMOS.
Sanu MathewDavid Money HarrisMark A. AndersSteven HsuRam KrishnamurthyPublished in: SoCC (2007)
Keyphrases
- field programmable gate array
- hardware implementation
- xilinx virtex
- clock gating
- power consumption
- fpga implementation
- cmos technology
- clock frequency
- power dissipation
- digital signal processing
- high speed
- integer arithmetic
- low power
- nm technology
- power reduction
- silicon on insulator
- low cost
- low end
- smart card
- hardware architecture
- metal oxide semiconductor
- random access memory
- efficient implementation
- image processing algorithms
- high end
- low voltage
- image sensor
- parallel processing
- parallel computing
- signal processing
- digital signature
- encryption algorithms
- secret key
- image encryption
- embedded systems
- encryption scheme
- security analysis
- high security
- encryption algorithm
- floating point
- key exchange
- elliptic curve cryptography
- parallel architecture
- compute intensive
- modular exponentiation
- advanced encryption standard