A Single-Bit 500 kHz-10 MHz Multimode Power-Performance Scalable 83-to-67 dB DR CTΔΣ for SDR in 90 nm Digital CMOS.
Pieter CrombezGeert Van der PlasMichiel SteyaertJan CraninckxPublished in: IEEE J. Solid State Circuits (2010)
Keyphrases
- power consumption
- nm technology
- cmos technology
- high speed
- low power
- clock gating
- silicon on insulator
- power dissipation
- analog to digital converter
- circuit design
- mixed signal
- ct images
- metal oxide semiconductor
- database
- low voltage
- power reduction
- x ray
- computed tomography
- power supply
- power management
- computerized tomography
- high frequency
- low cost