MPEG4 AVC/H.264 decoder with scalable bus architecture and dual memory controller.
Hae-Yong KangKyung-Ah JeongJung-Yang BaeYoung-Su LeeSeung-Ho LeePublished in: ISCAS (2) (2004)
Keyphrases
- mpeg avc
- multithreading
- highly efficient
- scalable video coding
- video codec
- parallel computing
- high definition
- computational power
- memory efficient
- lossless intra coding
- high profile
- real time
- coarse grained
- memory requirements
- video coding
- high speed
- coding efficiency
- distributed memory
- bitstream
- fine grained
- image coding
- base layer
- bit rate
- computer vision