Hardware-accelerated cache simulation for multicore by FPGA.

Shih-Hao Hung Yi-Mo Ho Chih Wei Yeh Cheng-Yueh Liu Chen-Pang Lee

Published in: RACS (2018)

Keyphrases

simulation model
real time
neural network
general purpose
prefetching
hardware implementation
image processing
query processing
low cost
signal processing
computer systems
main memory
hardware design