ASIC implementation of a computationally efficient compressive sensing detection method using least squares optimization in 45 nm CMOS technology.
Mohamed ShabanTarek IdrissHaytham IdrissMagdy A. BayoumiPublished in: ICASSP (2015)
Keyphrases
- detection method
- cmos technology
- compressive sensing
- least squares
- low power
- detection algorithm
- low voltage
- embedded dram
- power consumption
- parallel processing
- random projections
- low cost
- sparse representation
- signal processing
- hardware implementation
- image representation
- image sensor
- design methodology
- high speed
- silicon on insulator