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A Low-Power, Low-Voltage WBAN-Compatible Sub-Sampling PSK Receiver in 65 nm CMOS.
Jiao Cheng
Nan Qi
Patrick Yin Chiang
Arun Natarajan
Published in:
IEEE J. Solid State Circuits (2014)
Keyphrases
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cmos technology
low voltage
low power
power consumption
low cost
high speed
single chip
power dissipation
mixed signal
random access memory
vlsi circuits
parallel processing
digital signal processing
image sensor
low power consumption
high resolution
cmos image sensor
hardware and software
digital images