An Energy Efficient Logic Approach to Implement CMOS Full Adder.
Pankaj KumarRajender Kumar SharmaPublished in: J. Circuits Syst. Comput. (2017)
Keyphrases
- delay insensitive
- logic circuits
- low power
- wireless sensor networks
- asynchronous circuits
- chip design
- power consumption
- power dissipation
- high speed
- sensor networks
- modal logic
- energy efficient
- random access memory
- low cost
- logic programming
- data flow
- real time
- analog vlsi
- predicate logic
- defeasible logic
- multi valued
- energy efficiency
- end to end