A Systolic Array Architecture for SVM Classifier for Machine Learning on Embedded Devices.
Srikanth RamadurgamDarshika G. PereraPublished in: ISCAS (2023)
Keyphrases
- svm classifier
- systolic array
- embedded devices
- support vector machine
- machine learning
- parallel architecture
- data flow
- support vector machine svm
- support vector
- image classification
- embedded systems
- feature vectors
- training set
- mobile devices
- real time
- mobile commerce
- feature selection
- parallel processing
- data sets
- pattern recognition
- decision trees
- data mining
- text classification
- kernel function
- semi supervised
- hardware implementation
- flash memory
- low cost
- software architecture
- object oriented
- object recognition
- limited memory
- training data