A 0.5V 100MHz PD-SOI SRAM with enhanced read stability and write margin by asymmetric MOSFET and forward body bias.
Koji NiiMakoto YabuuchiYasumasa TsukamotoYuuichi HiranoToshiaki IwamatsuYuji KiharaPublished in: ISSCC (2010)
Keyphrases
- read write
- high speed
- power consumption
- support vector
- human body
- disk drives
- voltage stability
- low power
- stability analysis
- hard disk
- objective function
- power system
- data transmission
- bi directional
- forward and backward
- variance reduction
- training set
- maximum margin
- body parts
- main memory
- support vector machine
- write operations
- nm technology
- flash memory
- half spaces
- partial discharge