RACER: Bit-Pipelined Processing Using Resistive Memory.
Minh S. Q. TruongEric ChenDeanyone SuLiting ShenAlexander GlassL. Richard CarleyJames A. BainSaugata GhosePublished in: MICRO (2021)
Keyphrases
- real time
- random access
- data processing
- memory management
- processing elements
- parallel architecture
- instruction set architecture
- random access memory
- linear array
- hash table
- computing power
- memory usage
- computational power
- memory requirements
- website
- external memory
- efficient processing
- virtual memory
- information processing
- case study