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A 186-Mvertices/s 161-mW Floating-Point Vertex Processor With Optimized Datapath and Vertex Caches.

Chang-Hyo YuKyusik ChungDonghyun KimSeok-Hoon KimLee-Sup Kim
Published in: IEEE Trans. Very Large Scale Integr. Syst. (2009)
Keyphrases
  • floating point
  • instruction set
  • fixed point
  • floating point arithmetic
  • power consumption
  • floating point unit
  • square root
  • interval arithmetic
  • sparse matrices