Minimum selection GSC and adaptive low-power rake combining scheme.

Suk Won Kim Dong Sam Ha Jeffrey H. Reed

Published in: ISCAS (4) (2003)

Keyphrases

low power
power consumption
low cost
high speed
high power
single chip
vlsi circuits
wireless transmission
digital signal processing
logic circuits
gate array
vlsi architecture
nm technology
low power consumption
image sensor
ultra low power
mc cdma
power dissipation