Lower Bound Estimation for Low Power High-Level Synthesis.
Lars KruseEike SchmidtGerd JochensAnsgar StammermannWolfgang NebelPublished in: ISSS (2000)
Keyphrases
- low power
- lower bound
- high level synthesis
- power consumption
- low cost
- high speed
- upper bound
- single chip
- low power consumption
- vlsi architecture
- vlsi circuits
- wireless transmission
- high power
- objective function
- logic circuits
- parallel architecture
- image sensor
- cmos technology
- estimation algorithm
- design space exploration
- power reduction
- real time
- power dissipation
- digital signal processing
- constraint satisfaction problems
- np hard