SMT-Based Unbounded Model Checking for ATL.
Michal KanskiArtur NiewiadomskiMagdalena KacprzakWojciech PenczekWojciech NabialekPublished in: VECoS (2021)
Keyphrases
- model checking
- alternating time temporal logic
- temporal logic
- formal verification
- automated verification
- finite state
- temporal properties
- formal specification
- reachability analysis
- symbolic model checking
- partial order reduction
- model checker
- finite state machines
- timed automata
- verification method
- formal methods
- concurrent systems
- transition systems
- process algebra
- reactive systems
- computation tree logic
- bounded model checking
- asynchronous circuits
- epistemic logic
- linear temporal logic
- pspace complete
- artificial intelligence