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Synchronisation von Schleifenkörpern zur dynamischen Ablaufplanung über die HW/SW-Grenze eines Configurable System on Chip (CSoC).
Marko Rößler
Jan Langer
Ulrich Heinkel
Published in:
MBMV (2013)
Keyphrases
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hw sw
hardware software partitioning
embedded systems
hardware software
bit error rate
design methodology
hardware and software
low cost
computer simulation
signal to noise ratio
multipath
feature analysis
field programmable gate array
software systems
parallel execution