A low-power 10-bit CCP-based pipelined ADC using a multi-level variable current source MDAC and an ultra-low-power double-tail dynamic latch.
Hossein FirouzkouhiMohammadreza AshrafPublished in: Int. J. Circuit Theory Appl. (2021)
Keyphrases
- low power
- ultra low power
- power consumption
- high speed
- single chip
- low cost
- analog to digital converter
- wide dynamic range
- high power
- wireless transmission
- low power consumption
- vlsi circuits
- vlsi architecture
- power reduction
- image sensor
- digital signal processing
- logic circuits
- mixed signal
- data flow
- power dissipation
- cmos technology
- image processing