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Optimized cellular neural network universal machine emulation on FPGA.
Giovanni Egidio Pazienza
Jordi Bellana-Camanes
Jordi Riera-Babures
Xavier Vilasís-Cardona
Marco Antonio Moreno-Armendáriz
Marco Balsi
Published in:
ECCTD (2007)
Keyphrases
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cellular neural networks
fixed point
hardware implementation
high speed
flowshop
neural network
low cost
batch processing
signal processing
field programmable gate array
hardware design
computer vision
low power
single chip
turing machine