Newly-Built Iterative Receiver and Hardware Implementation for V-BLAST.
Rong ChenXun FanYouyun XuHaibin ZhangPublished in: IEICE Trans. Commun. (2007)
Keyphrases
- hardware implementation
- efficient implementation
- signal processing
- fpga implementation
- dedicated hardware
- image processing algorithms
- hardware architecture
- field programmable gate array
- hardware design
- software implementation
- pipeline architecture
- parallel architecture
- memory management
- computer vision
- image binarization
- fpga technology
- sequence alignment
- pattern recognition
- real time