HW/SW Partitioned Optimization and VLSI-FPGA Implementation of the MPEG-2 Video Decoder.
Matjaz VerderberAndrej ZemvaDamjan LampretPublished in: DATE (2003)
Keyphrases
- fpga implementation
- video decoder
- hw sw
- field programmable gate array
- embedded systems
- low power consumption
- bitstream
- hardware implementation
- video codec
- hardware software
- video coding
- low cost
- high speed
- signal processing
- hardware and software
- image processing algorithms
- design methodology
- real time
- coding scheme
- software systems
- computer vision