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A pseudo-hierarchical methodology for high performance microprocessor design.

A. BertoletK. CarpenterKeith M. CarrigAlbert M. ChuA. DeanFrank D. FerraioloS. KenyonD. PhanJohn G. PetrovickG. RodgersD. WillmottT. BairleyT. DeckerV. GirardiY. LapidM. MurphyP. Andrew ScottRichard J. Weiss
Published in: ISPD (1997)
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