A pseudo-hierarchical methodology for high performance microprocessor design.
A. BertoletK. CarpenterKeith M. CarrigAlbert M. ChuA. DeanFrank D. FerraioloS. KenyonD. PhanJohn G. PetrovickG. RodgersD. WillmottT. BairleyT. DeckerV. GirardiY. LapidM. MurphyP. Andrew ScottRichard J. WeissPublished in: ISPD (1997)