A 4.75GHz fractional frequency divider with digital spur calibration in 45nm CMOS.
Stefano PelleranoPaolo MadoglioYorgos PalaskasPublished in: ISSCC (2009)
Keyphrases
- power consumption
- clock gating
- metal oxide semiconductor
- high speed
- circuit design
- cmos technology
- camera calibration
- dielectric constant
- mixed signal
- low cost
- low power
- power dissipation
- silicon on insulator
- cmos image sensor
- phase locked loop
- nm technology
- computer vision
- simulation software
- frequency band
- analog vlsi
- dynamic range
- integrated circuit
- camera parameters