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The ROM Design with Half Grouping Compression Method for Chip Area and Power Consumption Reduction.

Ki-Sang JungKang-Jik KimYong-Eun KimJin-Gyun ChungKi-Hyun PyunJong-Yeol LeeHang-Geun JeongSeong Ik Cho
Published in: IEICE Trans. Electron. (2009)
Keyphrases
  • power consumption
  • low power
  • low power consumption
  • low cost
  • formal verification
  • single chip
  • power saving
  • power reduction
  • nm technology