Dynamically Modifiable Ciphers Using a Reconfigurable CAST-128 Based Algorithm on ATMEL's FPSLIC(tm) Reconfigurable FPGA Architecture.
Panayotis E. NastouYannis C. StamatiouPublished in: IPDPS (2002)
Keyphrases
- hardware implementation
- fpga implementation
- systolic array
- objective function
- learning algorithm
- hardware architecture
- low cost
- optimization algorithm
- computational cost
- general purpose
- software implementation
- worst case
- optimal solution
- k means
- parallel implementation
- neural network
- preprocessing
- parallel architecture
- field programmable gate array
- probabilistic model
- matching algorithm
- cost function
- real time
- np hard
- search space
- hardware design
- detection algorithm
- computational complexity
- hardware architectures