A 10-bit 400 MS/s asynchronous SAR ADC using dual-DAC architecture for speed enhancement.

Qingjun Fan Jinghong Chen

Published in: MWSCAS (2017)

Keyphrases

analog to digital converter
real time
image processing
management system
synthetic aperture radar
image enhancement
sigma delta
high speed
image reconstruction
network architecture
parameter estimation
constraint satisfaction
software architecture
sar images
sar imagery