Architecture-aware Memory Access Scheduling for High-throughput Cascaded Classifiers.
Hsiang-Chih HsiaoChun-Wei ChenJonas WangMing-Der ShiehPei-Yin ChenPublished in: DDECS (2019)
Keyphrases
- high throughput
- memory access
- data access
- microarray
- genome wide
- biological data
- memory management
- main memory
- memory hierarchy
- shared memory
- data acquisition
- high volume
- decision trees
- processing units
- gene expression
- access patterns
- external memory
- proteomic data
- database applications
- mass spectrometry
- parallel machines
- operating system
- multi dimensional
- image processing
- feature selection