A High Speed and Low Power 8 Bit × 8 Bit Multiplier Design Using Novel Two Transistor (2T) XOR Gates.
Himani UpadhyayShubhajit Roy ChowdhuryPublished in: J. Low Power Electron. (2015)
Keyphrases
- low power
- high speed
- logic circuits
- single chip
- low cost
- analog to digital converter
- low power consumption
- vlsi architecture
- shift register
- gate array
- power consumption
- digital signal processing
- power dissipation
- mixed signal
- nm technology
- cmos technology
- wireless transmission
- vlsi circuits
- high power
- ultra low power
- power reduction
- image sensor
- frame rate
- design process
- real time
- general purpose
- delay insensitive
- image processing