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A Novel High Speed Dynamic Comparator Using Positive Feedback with Low Power Dissipation and Low Offset.
Silpakesav Velagaleti
Pavankumar Gorpuni
K. K. Mahapatra
Published in:
ICT (2010)
Keyphrases
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low power
high speed
positive feedback
energy dissipation
power consumption
low power consumption
low cost
single chip
high power
digital signal processing
wireless transmission
logic circuits
vlsi architecture
power reduction
vlsi circuits
mixed signal
frame rate