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Polysilicon resistor stability under voltage stress for safe-operating area characterization.
Chris Kendrick
Michael Cook
Jeff P. Gambino
T. Myers
J. Slezak
T. Hirano
T. Sano
Y. Watanabe
K. Ozeki
Published in:
IRPS (2018)
Keyphrases
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random access memory
low voltage
operating point
power system
cmos technology
design considerations
transmission line
computer systems
voltage stability
database
data warehouse
low cost
low power