Login / Signup
Application of Formal Methods for System-Level Verification of Network on Chip.
Vinitha Arakkonam Palaniveloo
Arcot Sowmya
Published in:
ISVLSI (2011)
Keyphrases
</>
formal methods
model checker
model checking
formal analysis
protocol specification
development lifecycle
artificial intelligence
formal specification
case study
natural language
software engineering
knowledge based systems
modeling language