On hybrid memory allocation for FPGA behavioral synthesis (abstract only).
Qian ZhangChenfei MaQiang XuPublished in: FPGA (2014)
Keyphrases
- higher level
- real time image processing
- low cost
- field programmable gate array
- hybrid learning
- high speed
- real time
- digital signal
- dedicated hardware
- behavioral patterns
- texture synthesis
- hardware implementation
- signal processing
- low level
- high level
- human behavior
- evolutionary algorithm
- expert systems
- software implementation
- program synthesis
- genetic algorithm
- behavioral model
- data mining
- database