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Rail to rail CMOS complementary input stage with only one active differential pair at a time.
María de Rodanas Valero
Alejandro Roman-Loera
Jaime Ramírez-Angulo
Nicolás J. Medrano-Marqués
Santiago Celma
Published in:
IEICE Electron. Express (2014)
Keyphrases
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high speed
low cost
pairwise
real time
databases
real world
data mining
machine learning
information retrieval
information systems
input data
low power
vlsi circuits