A low-power 128×1-bit GaAs FIFO for ATM packet switcher.

Hidetoshi Kawasaki Stephen I. Long

Published in: IEEE J. Solid State Circuits (1996)

Keyphrases

low power
high speed
power consumption
low cost
single chip
wireless transmission
low power consumption
packet loss
high power
logic circuits
vlsi circuits
vlsi architecture
digital signal processing
nm technology
analog to digital converter
real time
power reduction
image sensor
end to end
gate array