Login / Signup
A 150 MS/s 10-bit CMOS Pipelined Subranging ADC with Time Constant Reduction Technique.
Xian Ping Fan
Pak Kwong Chan
Piew Yoong Chee
Published in:
IEICE Trans. Electron. (2009)
Keyphrases
</>
analog to digital converter
image sensor
random access memory
low power
high speed
single chip
cmos image sensor
data flow
mixed signal
magnetic tape
analog vlsi
power consumption
multi channel
random number generator