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Unlocking Wordline-level Parallelism for Fast Inference on RRAM-based DNN Accelerator.

Yeonhong ParkSeung Yul LeeHoon ShinJun HeoTae Jun HamJae W. Lee
Published in: ICCAD (2020)
Keyphrases
  • level parallelism
  • parallel implementation
  • instruction set
  • low cost
  • bayesian networks
  • parallel processing
  • bit rate