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A high-speed, low-power capacitive-coupling transceiver for wireless wafer-level testing systems.
Gil-Su Kim
Katsuyuki Ikeuchi
Mutsuo Daito
Makoto Takamiya
Takayasu Sakurai
Published in:
3DIC (2010)
Keyphrases
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low power
high speed
ultra low power
wireless transmission
low cost
power consumption
vlsi architecture
vlsi circuits
high power
single chip
low power consumption
frame rate
logic circuits
power reduction
cmos technology
digital signal processing
computer systems
gate array
real time
image sensor