Estimation of Peak Current through CMOS VLSI Circuit Supply Lines.

Toshio Murayama Kimihiro Ogawa Haruhiko Yamaguchi

Published in: ASP-DAC (1999)

Keyphrases

high speed
vlsi circuits
low voltage
circuit design
power dissipation
analog vlsi
low power
chip design
power consumption
delay insensitive
gate array
low cost
power reduction
real time
cmos technology
single chip
signal processing
short circuit