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A 6.5-12.5-Gb/s Half-Rate Single-Loop All-Digital Referenceless CDR in 28-nm CMOS.

Changzhi YuEuije SaSoowan JinHimchan ParkJongshin ShinJinwook Burm
Published in: IEEE J. Solid State Circuits (2020)
Keyphrases
  • high speed
  • circuit design
  • metal oxide semiconductor
  • power consumption
  • website
  • data sets
  • case study
  • steady state
  • analog vlsi
  • cmos image sensor