Design of Low Power 4-Tap 8-Bit Adiabatic FIR Filter.
Arun N. ChandorkarGurvinder SinghPublished in: CDES (2006)
Keyphrases
- low power
- single chip
- low cost
- fir filters
- power consumption
- high speed
- vlsi architecture
- low power consumption
- digital signal processing
- vlsi implementation
- logic circuits
- cmos technology
- filter design
- gate array
- analog to digital converter
- real time
- ultra low power
- power dissipation
- image sensor
- power reduction
- image compression