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Design and analysis of jitter-aware low-power and high-speed TSV link for 3D ICs.
Giulia Beanato
Kiarash Gharibdoust
Alessandro Cevrero
Giovanni De Micheli
Yusuf Leblebici
Published in:
Microelectron. J. (2016)
Keyphrases
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low power
high speed
single chip
low cost
low power consumption
power consumption
vlsi architecture
gate array
logic circuits
digital signal processing
cmos technology
high power
mixed signal
power reduction
frame rate
wireless transmission
real time
power dissipation
delay insensitive
nm technology